1 ? fn8176.0 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-352-6832 | intersil (and design) is a registered trademark of intersil americas inc. xdcp is a trademark of intersil americas inc. copy right intersil americas inc. 2005. all rights reserved all other trademarks mentioned are the property of their respective owners. X9312 terminal voltage 0v to +15v, 100 taps digitally controlled potentiometer (xdcp?) features ? solid-state potentiometer ? 3-wire serial interface ? terminal voltage, 0 to +15v ? 100 wiper tap points ?wiper position stored in nonvolatile memory and recalled on power-up ? 99 resistive elements ?temperature compensated ?end to end resistance range 20% ? low power cmos ?v cc = 5v ?active current, 3ma max. ?standby current, 1ma max. ? high reliability ?endurance, 100,000 data changes per bit ?register data retention, 100 years ?r total values = 10k ?, 50k ?, and 100k ? ? packages ?8-lead soic and dip description the intersil X9312 is a digitally controlled potentiometer (xdcp). the device consists of a resistor array, wiper swit ches, a control section, and nonvolatile memory. the wiper position is controlled by a 3-wire interface. the potentiometer is implemented by a resistor array composed of 99 resistive elements and a wiper switching network. between each element and at either end are tap points accessible to the wiper terminal. the position of the wiper element is controlled by the cs , u/d , and inc inputs. the position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. the device can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including: ? control ? parameter adjustments ? signal processing block diagram 7-bit up/down counter 7-bit nonvolatile memory store and recall control circuitry one of one decoder resistor array r h /v h u/d inc cs transfer gates hundred v cc v ss r l /v l r w /v w control and memory up/down (u/d ) increment (inc ) device select (cs ) v cc (supply voltage) v ss (ground) r h /v h r w /v w r l /v l general detailed 0 1 2 96 97 98 99 data sheet march 15, 2005 n o t r e c o m m e n d e d fo r n e w d e s i g n s n o r e c o m m e n d e d r e p la c e m e n t c on t a c t o ur t e c hn i c a l s u p po r t c e n t e r a t 1 - 8 8 8 - i n t e r s i l or w w w . i nt e r s i l . c om / t s c
2 fn8176.0 march 15, 2005 pin descriptions r h /v h and r l /v l the high (r h /v h ) and low (r l /v l ) terminals of the X9312 are equivalent to the fixed terminals of a mechanical potentiometer. the minimum voltage is 0v and the maximum is +15v. the terminology of r l /v l and r h /v h references the relative position of the terminal in relation to wiper movement direction selected by the u/d input and not the voltage potential on the terminal. r w /v w r w /v w is the wiper terminal and is equivalent to the movable terminal of a mechanical potentiometer. the position of the wiper withi n the array is determined by the control inputs. the wiper terminal series resistance is typically 40 ? . up/down (u/d ) the u/d input controls the direction of the wiper movement and whether the counter is incriminated or decremented. increment (inc ) the inc input is negative-edge triggered. toggling inc will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the u/d input. chip select (cs ) the device is selected when the cs input is low. the current counter value is stored in nonvolatile memory when cs is returned high while the inc input is also high. after the store operat ion is complete the X9312 will be placed in the low po wer standby mode until the device is selected once again. pin configuration pin names principles of operation there are three sections of the X9312: the input control, counter and decode section; the nonvolatile memory; and the resistor array. the input control section operates just like an up/down counter. the output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. under the proper conditions the contents of the counter can be stored in nonvolatile memory and retained for future use. the resistor array is comprised of 99 individual resistors connected in series. at either end of the array and between each resistor is an electronic switch that transfers the potential at that point to the wiper. the wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. that is, the counter does not wrap around when clocked to either extreme. the electronic switches on the device operate in a ?make before break? mode when the wiper changes tap positions. if the wiper is moved several positions, multiple taps are connected to the wiper for t iw (inc to v w change). the r total value for the device can temporarily be reduced by a significant amount if the wiper is moved se veral positions. when the device is powered-down, the last wiper position stored will be main tained in the nonvolatile memory. when power is restored, the contents of the memory are recalled and the wiper is set to the value last stored. r h /v h v cc inc u/d 1 2 3 4 8 7 6 5 X9312 dip/soic v ss cs r l /v l r w /v w symbol description r h /v h high terminal r w /v w wiper terminal r l /v l low terminal v ss ground v cc supply voltage u/d up/down control input inc increment control input cs chip select control input X9312
3 fn8176.0 march 15, 2005 instructions and programming the inc , u/d and cs inputs control the movement of the wiper along the resistor array. with cs set low the device is selected and enabled to respond to the u/d and inc inputs. high to low transitions on inc will increment or decrement (d epending on the state of the u/d input) a seven bit counter. the output of this counter is decoded to select one of one hundred wiper positions along the resistive array. the value of the counter is stored in nonvolatile memory whenever cs transitions high while the inc input is also high. the system may select the X9312, move the wiper and deselect the device without having to store the latest wiper position in n onvolatile memory. after the wiper movement is performed as described above and once the new position is reached, the system must keep inc low while taking cs high. the new wiper position will be maintained until changed by the system or until a powerup/down cycle recalled the previously stored data. this procedure allows the system to always power-up to a preset value stored in nonvolatile memory; then during system operation minor adjustments could be made. the adjustments might be based on user preference, system parameter changes due to temperature drift, etc... the state of u/d may be changed while cs remains low. this allows the host system to enable the device and then move the wiper up and down until the proper trim is attained. mode selection symbol table cs inc u/d mode l h wiper up l l wiper down h x store wiper position h x x standby current l x no store, return to standby waveform inputs outputs must be steady will be steady may change from low to high will change from low to high may change from high to low will change from high to low don?t care: changes allowed changing: state not known n/a center line is high impedance X9312
4 fn8176.0 march 15, 2005 absolute maximum ratings temperature under bias .................... -65 c to +135 c storage temperature ......................... -65c to +150c voltage on cs , inc , u/d and v cc with respect to v ss ................................. -1v to +7v ? v = |v h - v l | ........................................................ 15v lead temperature (soldering 10 seconds)......... 300c i w (10 seconds) ...............................................8.8ma comment stresses above those liste d under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only; functional operation of the device (at these or any ot her conditions above those listed in the operational sect ions of this specification) is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. potentiometer characteristics (over recommended operating conditions unless otherwise stated.) notes: (1) absolute linearity is utilized to determi ne actual wiper voltage versus expected voltage = (v w(n) (actual) - v w(n) (expected)) = 1 ml maximum. (2) relative linearity is a measure of the error in step size between taps = r w(n+1 - [r w(n) + ml] = 0.2 ml. (3) 1 ml = minimum increment = r tot /99. symbol parameter limits test conditions/notes min. typ. max. unit end to end resistance tolerance 20 % v vh v h terminal voltage v ss 15 v v ss = 0v v vl v l terminal voltage v ss 15 v v ss = 0v power rating 25 mw r total 10k ? power rating 225 mw r total = 1k ? r w wiper resistance 40 100 ? i w = 1ma, v cc = 5v i w wiper current 4.4 ma noise -120 dbv ref: 1khz resolution 1 % absolute linearity (1) 1 mi (3) r w(n)(actual) - r w(n)(expected) relative linearity (2) 0.2 mi (3) r w(n+1) - [r w(n) + mi ] r total temperature coefficient 300 ppm/c ratiometric temperature coefficient 20 ppm/c c h /c l /c w potentiometer capacitances 10/10/25 pf see circuit #3 recommended operating conditions temperature min. max. commercial 0c +70c industrial -40c +85c supply voltage (v cc )limits X9312 5v 10% X9312
5 fn8176.0 march 15, 2005 d.c. operating characteristics (over recommended operating conditions unless otherwise specified.) endurance and data retention notes: (4) typical values are for t a = 25c and nominal supply voltage. (5) this parameter is periodically sampled and not 100% tested. a.c. conditions of test symbol parameter limits unit test conditions min. typ. (4) max. i cc v cc active current (increment) 1 3 ma cs = v il , u/d = v il or v ih and inc = 0.4v/2.4v @ max. t cyc i sb standby supply current 500 1000 a cs = v cc - 0.3v, u/d and inc =v ss or v cc - 0.3v i li cs , inc , u/d input leakage current 10 a v in = v ss to v cc v ih cs , inc , u/d input high voltage 2 v cc + 1 v v il cs , inc , u/d input low voltage -1 0.8 v c in (5) cs , inc , u/d input capacitance 10 pf v cc = 5v, v in = v ss , t a = 25c, f=1mhz parameter min. unit minimum endurance 100,000 data changes per bit data retention 100 years test circuit #1 test circuit #2 circuit #3 spice macro model test point v w /r w v h /r h v l /r l v s force current l vw test point v h /r h v w /r w v l /r l c h c l r w 10pf 10pf r h r l r total c w 25pf input pulse levels 0v to 3v input rise and fall times 10ns input reference levels 1.5v X9312
6 fn8176.0 march 15, 2005 a.c. operating characteristics (over recommended operating conditions unless otherwise specified) power-up and down requirements there are no restrictions on the sequencing of v cc and the voltages applied to the potentiometer pins during power- up or power-down conditions. during power-up, the data sheet parameters for the dcp do not fully apply until 1 millisecond after v cc reaches is final value. the v cc ramp spec is always in effect. a.c. timing notes: (6) typical values are for t a = 25c and nominal supply voltage. (7) this parameter is sample tested. (8) mi in the a.c. timing diagram refers to the minimum incremental change in the v w output due to a change in the wiper position. symbol parameter limits unit min. typ. 6 max. t cl cs to inc setup 100 ns t ld inc high to u/d change 100 ns t di u/d to inc setup 1 s t ll inc low period 1 s t lh inc high period 1 s t lc inc inactive to cs inactive 1 s t cph cs deselect time (store) 20 ms t cph cs deselect time (no store) 100 ns t iw inc to vw change 100 500 s t cyc inc cycle time 4 s t r , t f 7 inc input rise and fall time 500 s t pu 7 power-up to wiper stable 500 s t r v cc 7 v cc power-up rate 0.2 50 v/ms cs inc u/d v w t ci t il t ih t cyc t id t di t iw mi (8) t ic t cph t f t r 10% 90% 90% X9312
7 fn8176.0 march 15, 2005 applications information electronic digitally controlled (xdcp) po tentiometers provid e three powerful application advantages; (1) the variability and reliability of a solid-state potentiometer, (2) the flexibilit y of computer-based digital co ntrols, and (3) the retentivity of nonvolatile memory used for the storage of multiple potentiomete r settings or data. basic configurations of electronic potentiometers basic circuits v r v w /r w v r i three terminal potentiometer; variable voltage divider two terminal variable resistor; variable current v h v l cascading techniques buffered reference voltage ? + +5v r 1 +v -5v v w v ref v out op-07 v w /r w v w /r w +v +v +v x (a) (b) v out = v w /r w noninverting amplifier v o = (1+r 2 /r 1 )v s voltage regulator r 1 r 2 i adj v o (reg) = 1.25v (1+r 2 /r 1 )+i adj r 2 v o (reg) v in 317 offset voltage adjustment + ? v s v o r 2 r 1 100k ? 10k ? 10k ? 10k ? -12v +12v tl072 comparator with hysteresis v ul = {r 1 /(r 1 +r 2 )} v o (max) v ll = {r 1 /(r 1 +r 2 )} v o (min) + ? v s v o r 2 r 1 lm308a +5v ?5v + ? v s v o r 2 r 1 } } lt311a (for additional circuits see an115) X9312
8 fn8176.0 march 15, 2005 packaging information 0.150 (3.80) 0.158 (4.00) 0.228 (5.80) 0.244 (6.20) 0.014 (0.35) 0.019 (0.49) pin 1 pin 1 index 0.010 (0.25) 0.020 (0.50) 0.050 (1.27) 0.188 (4.78) 0.197 (5.00) 0.004 (0.19) 0.010 (0.25) 0.053 (1.35) 0.069 (1.75) (4x) 7 0.016 (0.410) 0.037 (0.937) 0.0075 (0.19) 0.010 (0.25) 0 - 8 x 45 8-lead plastic small outline gull wing package type s note: all dimensions in inches (in parentheses in millimeters) 0.250" 0.050"typical 0.050" typical 0.030" typical 8 places footprint X9312
9 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn8176.0 march 15, 2005 ordering information physical characteristics marking includes manufacturer?s trademark resistance value or code date code temperature range blank = commercial = 0 c to +70 c i = industrial = -40 c to +85 c package p = 8-lead plastic dip s = 8-lead soic end to end resistance w = 10k ? X9312x x x X9312
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